From 40ac79ada89953f5ed9e36bdb5b3d0d3ae8d8f3e Mon Sep 17 00:00:00 2001 From: Maxime Chevalier-Boisvert Date: Wed, 15 Jun 2022 16:17:15 -0400 Subject: Add bitwise and to x86 backend --- yjit/src/backend/x86_64/mod.rs | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'yjit/src/backend') diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs index 7dcf41600d..e4f8745583 100644 --- a/yjit/src/backend/x86_64/mod.rs +++ b/yjit/src/backend/x86_64/mod.rs @@ -134,6 +134,10 @@ impl Assembler add(cb, insn.opnds[0].into(), insn.opnds[1].into()) }, + Op::And => { + and(cb, insn.opnds[0].into(), insn.opnds[1].into()) + }, + Op::Store => mov(cb, insn.opnds[0].into(), insn.opnds[1].into()), // This assumes only load instructions can contain references to GC'd Value operands -- cgit v1.2.3