diff options
| author | Todd Short <tshort@akamai.com> | 2022-04-28 14:56:11 -0400 |
|---|---|---|
| committer | Todd Short <todd.short@me.com> | 2022-07-29 08:32:16 -0400 |
| commit | 0113ec8460a918f8bc782130db8f75540b3b1ab2 (patch) | |
| tree | 2e8c7100cd3be8c2a0cc32efed6330daf3f8395f /apps | |
| parent | dffafaf48174497a724d546c3483d2493fc9b64c (diff) | |
| download | openssl-0113ec8460a918f8bc782130db8f75540b3b1ab2.tar.gz | |
Implement AES-GCM-SIV (RFC8452)
Fixes #16721
This uses AES-ECB to create a counter mode AES-CTR32 (32bit counter, I could
not get AES-CTR to work as-is), and GHASH to implement POLYVAL. Optimally,
there would be separate polyval assembly implementation(s), but the only one
I could find (and it was SSE2 x86_64 code) was not Apache 2.0 licensed.
This implementation lives only in the default provider; there is no legacy
implementation.
The code offered in #16721 is not used; that implementation sits on top of
OpenSSL, this one is embedded inside OpenSSL.
Full test vectors from RFC8452 are included, except the 0 length plaintext;
that is not supported; and I'm not sure it's worthwhile to do so.
Reviewed-by: Hugo Landau <hlandau@openssl.org>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/18693)
Diffstat (limited to 'apps')
| -rw-r--r-- | apps/speed.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/apps/speed.c b/apps/speed.c index 3d9e747900..2eab740fc5 100644 --- a/apps/speed.c +++ b/apps/speed.c @@ -2259,8 +2259,9 @@ int speed_main(int argc, char **argv) } OPENSSL_clear_free(loopargs[k].key, keylen); - /* SIV mode only allows for a single Update operation */ - if (EVP_CIPHER_get_mode(evp_cipher) == EVP_CIPH_SIV_MODE) + /* GCM-SIV/SIV mode only allows for a single Update operation */ + if (EVP_CIPHER_get_mode(evp_cipher) == EVP_CIPH_SIV_MODE + || EVP_CIPHER_get_mode(evp_cipher) == EVP_CIPH_GCM_SIV_MODE) (void)EVP_CIPHER_CTX_ctrl(loopargs[k].ctx, EVP_CTRL_SET_SPEED, 1, NULL); } |