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authorMaxime Chevalier-Boisvert <maxime.chevalierboisvert@shopify.com>2020-09-22 11:39:04 -0400
committerAlan Wu <XrXr@users.noreply.github.com>2021-10-20 18:19:23 -0400
commit38601da27dde73c75ec052d2d6ca555da71ee00e (patch)
tree2627d2039c34ec81b1c4233a28ae8f992b07168b
parent25acbaf4f603a0df1ab121a3d3140a1f7ab1a2b4 (diff)
downloadruby-38601da27dde73c75ec052d2d6ca555da71ee00e.tar.gz
Added 8-bit and 16-bit general-purpose registers, more tests.
-rw-r--r--ujit_asm.c38
-rw-r--r--ujit_asm.h36
-rw-r--r--ujit_asm_tests.c96
3 files changed, 89 insertions, 81 deletions
diff --git a/ujit_asm.c b/ujit_asm.c
index c5e508fddb..5d70c7b299 100644
--- a/ujit_asm.c
+++ b/ujit_asm.c
@@ -50,6 +50,42 @@ const x86opnd_t R13D = { OPND_REG, 32, .reg = { REG_GP, 13 }};
const x86opnd_t R14D = { OPND_REG, 32, .reg = { REG_GP, 14 }};
const x86opnd_t R15D = { OPND_REG, 32, .reg = { REG_GP, 15 }};
+// 16-bit GP registers
+const x86opnd_t AX = { OPND_REG, 16, .reg = { REG_GP, 0 }};
+const x86opnd_t CX = { OPND_REG, 16, .reg = { REG_GP, 1 }};
+const x86opnd_t DX = { OPND_REG, 16, .reg = { REG_GP, 2 }};
+const x86opnd_t BX = { OPND_REG, 16, .reg = { REG_GP, 3 }};
+const x86opnd_t SP = { OPND_REG, 16, .reg = { REG_GP, 4 }};
+const x86opnd_t BP = { OPND_REG, 16, .reg = { REG_GP, 5 }};
+const x86opnd_t SI = { OPND_REG, 16, .reg = { REG_GP, 6 }};
+const x86opnd_t DI = { OPND_REG, 16, .reg = { REG_GP, 7 }};
+const x86opnd_t R8W = { OPND_REG, 16, .reg = { REG_GP, 8 }};
+const x86opnd_t R9W = { OPND_REG, 16, .reg = { REG_GP, 9 }};
+const x86opnd_t R10W = { OPND_REG, 16, .reg = { REG_GP, 10 }};
+const x86opnd_t R11W = { OPND_REG, 16, .reg = { REG_GP, 11 }};
+const x86opnd_t R12W = { OPND_REG, 16, .reg = { REG_GP, 12 }};
+const x86opnd_t R13W = { OPND_REG, 16, .reg = { REG_GP, 13 }};
+const x86opnd_t R14W = { OPND_REG, 16, .reg = { REG_GP, 14 }};
+const x86opnd_t R15W = { OPND_REG, 16, .reg = { REG_GP, 15 }};
+
+// 8-bit GP registers
+const x86opnd_t AL = { OPND_REG, 8, .reg = { REG_GP, 0 }};
+const x86opnd_t CL = { OPND_REG, 8, .reg = { REG_GP, 1 }};
+const x86opnd_t DL = { OPND_REG, 8, .reg = { REG_GP, 2 }};
+const x86opnd_t BL = { OPND_REG, 8, .reg = { REG_GP, 3 }};
+const x86opnd_t SPL = { OPND_REG, 8, .reg = { REG_GP, 4 }};
+const x86opnd_t BPL = { OPND_REG, 8, .reg = { REG_GP, 5 }};
+const x86opnd_t SIL = { OPND_REG, 8, .reg = { REG_GP, 6 }};
+const x86opnd_t DIL = { OPND_REG, 8, .reg = { REG_GP, 7 }};
+const x86opnd_t R8B = { OPND_REG, 8, .reg = { REG_GP, 8 }};
+const x86opnd_t R9B = { OPND_REG, 8, .reg = { REG_GP, 9 }};
+const x86opnd_t R10B = { OPND_REG, 8, .reg = { REG_GP, 10 }};
+const x86opnd_t R11B = { OPND_REG, 8, .reg = { REG_GP, 11 }};
+const x86opnd_t R12B = { OPND_REG, 8, .reg = { REG_GP, 12 }};
+const x86opnd_t R13B = { OPND_REG, 8, .reg = { REG_GP, 13 }};
+const x86opnd_t R14B = { OPND_REG, 8, .reg = { REG_GP, 14 }};
+const x86opnd_t R15B = { OPND_REG, 8, .reg = { REG_GP, 15 }};
+
// Compute the number of bits needed to encode a signed value
size_t sig_imm_size(int64_t imm)
{
@@ -1130,7 +1166,7 @@ void mov(codeblock_t* cb, x86opnd_t dst, x86opnd_t src)
if (dst.num_bits == 16)
cb_write_byte(cb, 0x66);
- if (rex_needed(src) || dst.num_bits == 64)
+ if (rex_needed(dst) || dst.num_bits == 64)
cb_write_rex(cb, dst.num_bits == 64, 0, 0, dst.reg.reg_no);
cb_write_opcode(cb, (dst.num_bits == 8)? 0xB0:0xB8, dst);
diff --git a/ujit_asm.h b/ujit_asm.h
index 92f90d90c3..0ec1f08fa1 100644
--- a/ujit_asm.h
+++ b/ujit_asm.h
@@ -173,6 +173,42 @@ const x86opnd_t R13D;
const x86opnd_t R14D;
const x86opnd_t R15D;
+// 16-bit GP registers
+const x86opnd_t AX;
+const x86opnd_t CX;
+const x86opnd_t DX;
+const x86opnd_t BX;
+const x86opnd_t SP;
+const x86opnd_t BP;
+const x86opnd_t SI;
+const x86opnd_t DI;
+const x86opnd_t R8W;
+const x86opnd_t R9W;
+const x86opnd_t R10W;
+const x86opnd_t R11W;
+const x86opnd_t R12W;
+const x86opnd_t R13W;
+const x86opnd_t R14W;
+const x86opnd_t R15W;
+
+// 8-bit GP registers
+const x86opnd_t AL;
+const x86opnd_t CL;
+const x86opnd_t DL;
+const x86opnd_t BL;
+const x86opnd_t SPL;
+const x86opnd_t BPL;
+const x86opnd_t SIL;
+const x86opnd_t DIL;
+const x86opnd_t R8B;
+const x86opnd_t R9B;
+const x86opnd_t R10B;
+const x86opnd_t R11B;
+const x86opnd_t R12B;
+const x86opnd_t R13B;
+const x86opnd_t R14B;
+const x86opnd_t R15B;
+
// Memory operand with base register and displacement/offset
x86opnd_t mem_opnd(size_t num_bits, x86opnd_t base_reg, int32_t disp);
diff --git a/ujit_asm_tests.c b/ujit_asm_tests.c
index 5de7978858..b89090713c 100644
--- a/ujit_asm_tests.c
+++ b/ujit_asm_tests.c
@@ -67,24 +67,10 @@ void run_tests()
cb_init(cb, 4096);
// add
- /*
- test(
- delegate void (CodeBlock cb) { cb.add(X86Opnd(CL), X86Opnd(3)); },
- "80C103"
- );
- test(
- delegate void (CodeBlock cb) { cb.add(X86Opnd(CL), X86Opnd(BL)); },
- "00D9"
- );
- test(
- delegate void (CodeBlock cb) { cb.add(X86Opnd(CL), X86Opnd(SPL)); },
- "4000E1"
- );
- test(
- delegate void (CodeBlock cb) { cb.add(X86Opnd(CX), X86Opnd(BX)); },
- "6601D9"
- );
- */
+ cb_set_pos(cb, 0); add(cb, CL, imm_opnd(3)); check_bytes(cb, "80C103");
+ cb_set_pos(cb, 0); add(cb, CL, BL); check_bytes(cb, "00D9");
+ cb_set_pos(cb, 0); add(cb, CL, SPL); check_bytes(cb, "4000E1");
+ cb_set_pos(cb, 0); add(cb, CX, BX); check_bytes(cb, "6601D9");
cb_set_pos(cb, 0); add(cb, RAX, RBX); check_bytes(cb, "4801D8");
cb_set_pos(cb, 0); add(cb, ECX, EDX); check_bytes(cb, "01D1");
cb_set_pos(cb, 0); add(cb, RDX, R14); check_bytes(cb, "4C01F2");
@@ -120,12 +106,7 @@ void run_tests()
cb_set_pos(cb, 0); cmovle(cb, ESI, mem_opnd(32, RSP, 4)); check_bytes(cb, "0F4E742404");
// cmp
- /*
- test(
- delegate void (CodeBlock cb) { cb.cmp(X86Opnd(CL), X86Opnd(DL)); },
- "38D1"
- );
- */
+ cb_set_pos(cb, 0); cmp(cb, CL, DL); check_bytes(cb, "38D1");
cb_set_pos(cb, 0); cmp(cb, ECX, EDI); check_bytes(cb, "39F9");
cb_set_pos(cb, 0); cmp(cb, RDX, mem_opnd(64, R12, 0)); check_bytes(cb, "493B1424");
cb_set_pos(cb, 0); cmp(cb, RAX, imm_opnd(2)); check_bytes(cb, "4883F802");
@@ -134,12 +115,7 @@ void run_tests()
cb_set_pos(cb, 0); cqo(cb); check_bytes(cb, "4899");
// dec
- /*
- test(
- delegate void (CodeBlock cb) { cb.dec(X86Opnd(CX)); },
- "66FFC9"
- );
- */
+ cb_set_pos(cb, 0); dec(cb, CX); check_bytes(cb, "66FFC9");
cb_set_pos(cb, 0); dec(cb, EDX); check_bytes(cb, "FFCA");
// div
@@ -155,12 +131,7 @@ void run_tests()
*/
// inc
- /*
- test(
- delegate void (CodeBlock cb) { cb.inc(X86Opnd(BL)); },
- "FEC3"
- );
- */
+ cb_set_pos(cb, 0); inc(cb, BL); check_bytes(cb, "FEC3");
cb_set_pos(cb, 0); inc(cb, ESP); check_bytes(cb, "FFC4");
cb_set_pos(cb, 0); inc(cb, mem_opnd(32, RSP, 0)); check_bytes(cb, "FF0424");
cb_set_pos(cb, 0); inc(cb, mem_opnd(64, RSP, 4)); check_bytes(cb, "48FF442404");
@@ -202,45 +173,20 @@ void run_tests()
delegate void (CodeBlock cb) { cb.mov(X86Opnd(AL), X86Opnd(8, RCX, 0, 1, RDX)); },
"8A0411"
);
- test(
- delegate void (CodeBlock cb) { cb.mov(X86Opnd(CL), X86Opnd(R9L)); },
- "4488C9"
- );
*/
+ cb_set_pos(cb, 0); mov(cb, CL, R9B); check_bytes(cb, "4488C9");
cb_set_pos(cb, 0); mov(cb, RBX, RAX); check_bytes(cb, "4889C3");
cb_set_pos(cb, 0); mov(cb, RDI, RBX); check_bytes(cb, "4889DF");
- /*
- test(
- delegate void (CodeBlock cb) { cb.mov(X86Opnd(SIL), X86Opnd(11)); },
- "40B60B"
- );
- */
+ cb_set_pos(cb, 0); mov(cb, SIL, imm_opnd(11)); check_bytes(cb, "40B60B");
cb_set_pos(cb, 0); mov(cb, mem_opnd(8, RSP, 0), imm_opnd(-3)); check_bytes(cb, "C60424FD");
cb_set_pos(cb, 0); mov(cb, mem_opnd(64, RDI, 8), imm_opnd(1)); check_bytes(cb, "48C7470801000000");
// movsx
- /*
- test(
- delegate void (CodeBlock cb) { cb.movsx(X86Opnd(AX), X86Opnd(AL)); },
- "660FBEC0"
- );
- test(
- delegate void (CodeBlock cb) { cb.movsx(X86Opnd(EDX), X86Opnd(AL)); },
- "0FBED0"
- );
- test(
- delegate void (CodeBlock cb) { cb.movsx(X86Opnd(RAX), X86Opnd(BL)); },
- "480FBEC3"
- );
- test(
- delegate void (CodeBlock cb) { cb.movsx(X86Opnd(ECX), X86Opnd(AX)); },
- "0FBFC8"
- );
- test(
- delegate void (CodeBlock cb) { cb.movsx(X86Opnd(R11), X86Opnd(CL)); },
- "4C0FBED9"
- );
- */
+ cb_set_pos(cb, 0); movsx(cb, AX, AL); check_bytes(cb, "660FBEC0");
+ cb_set_pos(cb, 0); movsx(cb, EDX, AL); check_bytes(cb, "0FBED0");
+ cb_set_pos(cb, 0); movsx(cb, RAX, BL); check_bytes(cb, "480FBEC3");
+ cb_set_pos(cb, 0); movsx(cb, ECX, AX); check_bytes(cb, "0FBFC8");
+ cb_set_pos(cb, 0); movsx(cb, R11, CL); check_bytes(cb, "4C0FBED9");
cb_set_pos(cb, 0); movsx(cb, R10, mem_opnd(32, RSP, 12)); check_bytes(cb, "4C6354240C");
cb_set_pos(cb, 0); movsx(cb, RAX, mem_opnd(8, RSP, 0)); check_bytes(cb, "480FBE0424");
@@ -251,12 +197,7 @@ void run_tests()
cb_set_pos(cb, 0); nop(cb, 1); check_bytes(cb, "90");
// not
- /*
- test(
- delegate void (CodeBlock cb) { cb.not(X86Opnd(AX)); },
- "66F7D0"
- );
- */
+ cb_set_pos(cb, 0); not(cb, AX); check_bytes(cb, "66F7D0");
cb_set_pos(cb, 0); not(cb, EAX); check_bytes(cb, "F7D0");
cb_set_pos(cb, 0); not(cb, mem_opnd(64, R12, 0)); check_bytes(cb, "49F71424");
cb_set_pos(cb, 0); not(cb, mem_opnd(32, RSP, 301)); check_bytes(cb, "F794242D010000");
@@ -347,12 +288,7 @@ void run_tests()
cb_set_pos(cb, 0); ret(cb); check_bytes(cb, "C3");
// sal
- /*
- test(
- delegate void (CodeBlock cb) { cb.sal(X86Opnd(CX), X86Opnd(1)); },
- "66D1E1"
- );
- */
+ cb_set_pos(cb, 0); sal(cb, CX, imm_opnd(1)); check_bytes(cb, "66D1E1");
cb_set_pos(cb, 0); sal(cb, ECX, imm_opnd(1)); check_bytes(cb, "D1E1");
cb_set_pos(cb, 0); sal(cb, EBP, imm_opnd(5)); check_bytes(cb, "C1E505");
cb_set_pos(cb, 0); sal(cb, mem_opnd(32, RSP, 68), imm_opnd(1)); check_bytes(cb, "D1642444");