YJIT: Avoid register allocation conflict with a higher stack_idx (#9143)

YJIT: Avoid register allocation conflict

with a higher stack_idx

1 files changed, 18 insertions, 0 deletions

diff --git a/bootstraptest/test_yjit.rb b/bootstraptest/test_yjit.rb
index 1a4db302d0..ba288a7936 100644
--- a/bootstraptest/test_yjit.rb
+++ b/bootstraptest/test_yjit.rb
@@ -4273,3 +4273,21 @@ assert_normal_exit %q{
   Foo.class_eval "def initialize() #{ivars} end"
   Foo.new
 }
+
+assert_equal '0', %q{
+  def spill
+    1.to_i # not inlined
+  end
+
+  def inline(_stack1, _stack2, _stack3, _stack4, _stack5)
+    0 # inlined
+  end
+
+  def entry
+    # RegTemps is 00111110 prior to the #inline call.
+    # Its return value goes to stack_idx=0, which conflicts with stack_idx=5.
+    inline(spill, 2, 3, 4, 5)
+  end
+
+  entry
+}