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| author | Koichi Sasada <ko1@atdot.net> | 2020-10-16 15:20:40 +0900 |
|---|---|---|
| committer | Koichi Sasada <ko1@atdot.net> | 2020-10-17 08:18:04 +0900 |
| commit | f6661f50854e0cdccb03ee516a21ce62adf6c802 (patch) | |
| tree | 72668d7b8a8cdbe7f84234bdd99e93a9049a7918 /mjit_compile.c | |
| parent | 91ec5f9e39cf54dd7a157addb778293853571f13 (diff) | |
| download | ruby-f6661f50854e0cdccb03ee516a21ce62adf6c802.tar.gz | |
sync RClass::ext::iv_index_tbl
iv_index_tbl manages instance variable indexes (ID -> index).
This data structure should be synchronized with other ractors
so introduce some VM locks.
This patch also introduced atomic ivar cache used by
set/getinlinecache instructions. To make updating ivar cache (IVC),
we changed iv_index_tbl data structure to manage (ID -> entry)
and an entry points serial and index. IVC points to this entry so
that cache update becomes atomically.
Diffstat (limited to 'mjit_compile.c')
| -rw-r--r-- | mjit_compile.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/mjit_compile.c b/mjit_compile.c index d58377380e..6371acc8f9 100644 --- a/mjit_compile.c +++ b/mjit_compile.c @@ -443,17 +443,17 @@ init_ivar_compile_status(const struct rb_iseq_constant_body *body, struct compil if (insn == BIN(getinstancevariable) || insn == BIN(setinstancevariable)) { IVC ic = (IVC)body->iseq_encoded[pos+2]; IVC ic_copy = &(status->is_entries + ((union iseq_inline_storage_entry *)ic - body->is_entries))->iv_cache; - if (ic_copy->ic_serial) { // Only initialized (ic_serial > 0) IVCs are optimized + if (ic_copy->entry) { // Only initialized (ic_serial > 0) IVCs are optimized num_ivars++; - if (status->max_ivar_index < ic_copy->index) { - status->max_ivar_index = ic_copy->index; + if (status->max_ivar_index < ic_copy->entry->index) { + status->max_ivar_index = ic_copy->entry->index; } if (status->ivar_serial == 0) { - status->ivar_serial = ic_copy->ic_serial; + status->ivar_serial = ic_copy->entry->class_serial; } - else if (status->ivar_serial != ic_copy->ic_serial) { + else if (status->ivar_serial != ic_copy->entry->class_serial) { // Multiple classes have used this ISeq. Give up assuming one serial. status->merge_ivar_guards_p = false; return; |