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author | Alan Wu <XrXr@users.noreply.github.com> | 2022-10-06 18:41:38 -0400 |
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committer | GitHub <noreply@github.com> | 2022-10-06 18:41:38 -0400 |
commit | 43e87c7e8ab5cbf253c8f11daf9c8ad4bc3d7b3e (patch) | |
tree | 7696c3ee5c3e54abe7bfaccf763645291e8d909b /regsyntax.c | |
parent | fa2e1b67e548cb5653b66909a2bc3d6b9eae98e3 (diff) | |
download | ruby-43e87c7e8ab5cbf253c8f11daf9c8ad4bc3d7b3e.tar.gz |
YJIT: fix ARM64 bitmask encoding for 32 bit registers (#6503)
For logical instructions such as AND, there is a constraint that the N
part of the bitmask immediate must be 0. We weren't respecting this
condition previously and were silently emitting undefined instructions.
Check for this condition in the assembler and tweak the backend to
correctly detect whether a number could be encoded as an immediate in a
32 bit logical instruction. Due to the nature of the immediate encoding,
the same numeric value encodes differently depending on the size of
the register the instruction works on.
We currently don't have cases where we use 32 bit immediates but we ran
into this encoding issue during development.
Diffstat (limited to 'regsyntax.c')
0 files changed, 0 insertions, 0 deletions