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| author | Kevin Newton <kddnewton@gmail.com> | 2022-07-13 16:48:55 -0400 |
|---|---|---|
| committer | Takashi Kokubun <takashikkbn@gmail.com> | 2022-08-29 08:47:00 -0700 |
| commit | 15c6aacd399b2bc7fb5ee2d6422451c4eb47941f (patch) | |
| tree | f16d856c4ec1d49d6b7cd973ad4cc05c7e0a0a69 /yjit/src/asm/arm64/arg | |
| parent | 8d743e965e6bf95ea1649839fc1fe2429564c2d9 (diff) | |
| download | ruby-15c6aacd399b2bc7fb5ee2d6422451c4eb47941f.tar.gz | |
Encode MRS and MSR for AArch64 (https://github.com/Shopify/ruby/pull/315)
Diffstat (limited to 'yjit/src/asm/arm64/arg')
| -rw-r--r-- | yjit/src/asm/arm64/arg/mod.rs | 2 | ||||
| -rw-r--r-- | yjit/src/asm/arm64/arg/sys_reg.rs | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/yjit/src/asm/arm64/arg/mod.rs b/yjit/src/asm/arm64/arg/mod.rs index 0d2f1ac28a..bb779ab6df 100644 --- a/yjit/src/asm/arm64/arg/mod.rs +++ b/yjit/src/asm/arm64/arg/mod.rs @@ -4,7 +4,9 @@ mod bitmask_imm; mod condition; mod sf; +mod sys_reg; pub use bitmask_imm::BitmaskImmediate; pub use condition::Condition; pub use sf::Sf; +pub use sys_reg::SystemRegister; diff --git a/yjit/src/asm/arm64/arg/sys_reg.rs b/yjit/src/asm/arm64/arg/sys_reg.rs new file mode 100644 index 0000000000..41d71920cb --- /dev/null +++ b/yjit/src/asm/arm64/arg/sys_reg.rs @@ -0,0 +1,6 @@ +/// The encoded representation of an A64 system register. +/// https://developer.arm.com/documentation/ddi0601/2022-06/AArch64-Registers/ +pub enum SystemRegister { + /// https://developer.arm.com/documentation/ddi0601/2022-06/AArch64-Registers/NZCV--Condition-Flags?lang=en + NZCV = 0b1_011_0100_0010_000 +} |