aboutsummaryrefslogtreecommitdiffstats
path: root/yjit/src/backend/arm64/mod.rs
diff options
context:
space:
mode:
Diffstat (limited to 'yjit/src/backend/arm64/mod.rs')
-rw-r--r--yjit/src/backend/arm64/mod.rs8
1 files changed, 4 insertions, 4 deletions
diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs
index 0c784c0bea..ce1dd2e43c 100644
--- a/yjit/src/backend/arm64/mod.rs
+++ b/yjit/src/backend/arm64/mod.rs
@@ -165,8 +165,8 @@ impl Assembler
Opnd::Reg(_) | Opnd::InsnOut { .. } => opnd,
Opnd::Mem(_) => split_load_operand(asm, opnd),
Opnd::Imm(imm) => {
- if imm <= 0 {
- asm.load(opnd)
+ if imm == 0 {
+ Opnd::Reg(XZR_REG)
} else if (dest_num_bits == 64 &&
BitmaskImmediate::try_from(imm as u64).is_ok()) ||
(dest_num_bits == 32 &&
@@ -1352,8 +1352,8 @@ mod tests {
asm.test(Opnd::Reg(X0_REG), Opnd::Imm(-7));
asm.compile_with_num_regs(&mut cb, 1);
- // Assert that a load and a test instruction were written.
- assert_eq!(8, cb.get_write_pos());
+ // Assert that a test instruction is written.
+ assert_eq!(4, cb.get_write_pos());
}
#[test]