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* Get started on branchunless portMaxime Chevalier-Boisvert2022-08-291-0/+6
* Add test for direct jump to a code pointerMaxime Chevalier-Boisvert2022-08-291-0/+12
* Arm64 progress (https://github.com/Shopify/ruby/pull/304)Kevin Newton2022-08-294-29/+398
* Conscise IR disassembly (https://github.com/Shopify/ruby/pull/302)Alan Wu2022-08-291-4/+67
* Delete dbg!() callsAlan Wu2022-08-292-2/+0
* Fix backend transform bug, add testMaxime Chevalier-Boisvert2022-08-292-9/+22
* Port over get_branch_target()Maxime Chevalier-Boisvert2022-08-292-3/+20
* Add jo insn and test for joMaxime Chevalier-Boisvert2022-08-293-2/+47
* Port guard_two_fixnumsMaxime Chevalier-Boisvert2022-08-292-1/+21
* Make sure allocated reg size in bits matches insn out sizeMaxime Chevalier-Boisvert2022-08-293-30/+79
* Add Opnd.rm_num_bits() methodMaxime Chevalier-Boisvert2022-08-291-1/+11
* Fix small bug in x86_splitMaxime Chevalier-Boisvert2022-08-292-2/+27
* Get rid of temporary context methodsMaxime Chevalier-Boisvert2022-08-292-28/+2
* Add bitwise and to x86 backendMaxime Chevalier-Boisvert2022-08-291-0/+4
* Add stores to one of the testsMaxime Chevalier-Boisvert2022-08-293-2/+11
* Move backend tests to their own fileMaxime Chevalier-Boisvert2022-08-295-228/+238
* Add support for using InsnOut as memory operand baseMaxime Chevalier-Boisvert2022-08-292-24/+88
* Rename transform_insns to forward_passMaxime Chevalier-Boisvert2022-08-292-4/+4
* Add assertMaxime Chevalier-Boisvert2022-08-291-0/+1
* Remove unused code, add backend asm testMaxime Chevalier-Boisvert2022-08-291-33/+23
* Port bitwise not, gen_check_ints()Maxime Chevalier-Boisvert2022-08-292-5/+6
* Add atomic counter increment instructionMaxime Chevalier-Boisvert2022-08-292-0/+11
* Port over putnil, putobject, and gen_leave()Maxime Chevalier-Boisvert2022-08-292-120/+62
* Port gen_leave_exit(), add support for labels to backendMaxime Chevalier-Boisvert2022-08-292-26/+89
* Add cpush and cpop IR instructionsMaxime Chevalier-Boisvert2022-08-292-8/+18
* Add conditional jumpsMaxime Chevalier-Boisvert2022-08-291-12/+17
* Map comments in backendMaxime Chevalier-Boisvert2022-08-291-2/+5
* Have Assembler::compile() return a list of GC offsetsMaxime Chevalier-Boisvert2022-08-293-37/+38
* Remove x86_64 dependency in core.rsMaxime Chevalier-Boisvert2022-08-291-1/+2
* * Arm64 Beginnings (https://github.com/Shopify/ruby/pull/291)Maxime Chevalier-Boisvert2022-08-292-2/+65
* Add test for lea and ret. Fix codegen for lea and ret.Maxime Chevalier-Boisvert2022-08-292-6/+26
* Change codegen.rs to use backend Assembler directlyMaxime Chevalier-Boisvert2022-08-292-2/+21
* Implement gc offset logicMaxime Chevalier-Boisvert2022-08-292-31/+67
* Load GC Value operands into registersMaxime Chevalier-Boisvert2022-08-291-1/+31
* Add CCall IR insn, implement gen_swap()Maxime Chevalier-Boisvert2022-08-292-9/+71
* Add gen_dupnMaxime Chevalier-Boisvert2022-08-291-0/+4
* Add test with register reuseMaxime Chevalier-Boisvert2022-08-292-1/+18
* Fix issue with load, gen_dupMaxime Chevalier-Boisvert2022-08-291-9/+8
* Implement target-specific insn splitting with Kevin. Add tests.Maxime Chevalier-Boisvert2022-08-292-26/+81
* Make assembler methods public, sketch gen_dup with new backendMaxime Chevalier-Boisvert2022-08-291-9/+9
* Fix bug with asm.comment()Maxime Chevalier-Boisvert2022-08-292-3/+7
* Bias register allocator to reuse first operandMaxime Chevalier-Boisvert2022-08-292-14/+40
* Add dbg!() for Assembler. Fix regalloc issue.Maxime Chevalier-Boisvert2022-08-292-24/+56
* Function to map from Opnd => X86OpndMaxime Chevalier-Boisvert2022-08-292-20/+55
* Start work on platform-specific codegenMaxime Chevalier-Boisvert2022-08-293-0/+767
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